1) Prioritize the deployment of key signal lines or signal lines with rules. Rule inspection requires that key signal lines with rules meet the corresponding requirements.

Constraint rules; second, the non-critical signal lines are routed, and the overall rules are checked, requiring the non-critical signal lines to meet common design requirements; comprehensive use of wiring strategies to resolve conflicts.

Post-processing the wiring to improve signal quality and facilitate processing.

2) Rule priority: If a rule exists, the signal line required by the rule will be arranged first, and then the non-critical signal line will be arranged.

3) Priority of key signal lines: Priority wiring for key signals such as power, analog signals, high-speed signals, clock signals, differential signals, and synchronization signals.

4) Density priority: Start wiring from the most complicated device on the board, and start from the area with the densest wiring on the board.

5) Avoid using limit values for vias, line widths, and safety clearances.

6) The distance from the trace to the edge of the board usually needs to be ≥2mm. If the conditions cannot be met, it must be at least 20mil;

7) Provide dedicated wiring layers for key signals such as clock signals, high-frequency signals, and sensitive signals, and ensure the smallest loop area. Shielding and increasing safety clearance are used to ensure signal quality.

8) The EMC environment between the power layer and the ground is poor. Avoid arranging signal lines sensitive to interference.

9) Follow the rules of ground wire loop, crosstalk control rules, shielding protection, chamfers, device demagnetization, 3W, 20H, etc.